SOI means silicon on insulator. In SOI technique, devices usually are fabricated in a thin silicon film and a buried oxide layer (BOX) is disposed between the device and the substrate to separate them. Comparing to traditional bulk silicon, SOI technology has many advantages, such as reduced parasitic capacitance making SOI device provide higher speed and consume less power, full dielectric isolation of the SOI CMOS device eliminating the occurrence of bulk-Si CMOS device parasitic latch-up effects and making SOI technique have superior performances including high integration density, and good anti-irradiation properties. SOI technique has been widely applied in many technical fields such as radio-frequency, high voltage and anti-irradiation. With the size of the device continuing to shrink, SOI technique will be probably the first choice of Si technique instead of bulk silicon.
According to whether the active body region is depleted, SOI MOS can be classified into partially depleted SOI MOS (PDSOI) and fully depleted SOI MOS (FDSOI). Generally, the top silicon film of fully depleted SOI MOS is thinner leading to many disadvantages. In one hand, the thin silicon film has high cost, and in the other hand, the threshold voltage of the fully depleted SOI MOS is hard to control. Therefore, the partially depleted SOI MOS is general adopted currently.
The active body region of PDSOI (Partially Depleted SOI) is partially depleted which makes the body region appear in suspending state and the electric charge caused by impact ionization can't be removed rapidly, resulting in floating body effect which is the special characteristic of SOI MOS. For the electron-hole pairs produced via collision of the SOI MOS channel electrons, the holes will move to the body region. The floating body effect of SOI MOS will result in the accumulation of holes in the body region to raise the electric potential of the body region. Due to the body effect, the threshold voltage of SOI NMOS is reduced and the leakage current is increased resulting in the warping displacements of the output characteristic curve IdVd, known as the Kink effect. Kink effect having negative effects on the performances and reliabilities of the device and the circuit should be eliminated. The Kink effects of SOI PMOS device is not so obvious because the electron-hole pairs produced via collision is much less than SOI NMOS due to the lower ionization rate of the holes.
In order to resolve the problem of partially depleted SOI MOS, the method of body contact is usually adopted to connect the “body” to the fixed electric potential such as the source region or the ground. Referring to FIG. 1a-1b, in the traditional T-type gate structure body-contact, the P+ implantation region formed in one side of the T-type gate is contact to the P-type body region. During the operation of the MOS devices, the carriers accumulated in the body region release via flowing through the P+ channel to reduce electric potential of the body region. However, there are still some disadvantages such as complex manufacturing process, increased parasitic effect, degraded electric properties and increased device area. Therefore, the BTS (Body Tied to Source) structure, i.e. there is a conductive terminal in the source for leading out the accumulated holes in the body region, is provided to overcome the foregoing disadvantages. The BTS structure could effectively eliminating body floating effects without increasing the chip area. However, the BTS structure in the prior art always results in the asymmetry of the MOS devices and decreased effective channel width of the devices.
Therefore, in order to eliminate floating body effects of SOI MOS devices, there is a need for an improved BTS structure which could eliminate floating effects without decreasing the effective channel width of the devices and could be fabricated through a simple manufacturing process compatible with conventional CMOS process via silicide technology.